? semiconductor components industries, llc, 2017 march, 2018 ? rev. 4 1 publication order number: ncp718/d ncp718 300 ma low iq, wide i nput voltage low dropout regulator the ncp718 is 300 ma ldo linear voltage regulator. it is a very stable and accurate device with ultra?low quiescent current consumption (typ. 4 a over the full temperature range) and a wide input voltage range (up to 24 v). the regulator incorporates several protection features such as thermal shutdown and current limiting. features ? operating input voltage range: 2.5 v to 24 v ? fixed voltage options available: 1.2 v to 5 v (upon request) ? adjustable voltage option from 1.2 v to 5 v ? ultra?low quiescent current: typ. 4 a over temperature ? 2% accuracy over full load, line and temperature variations ? psrr: 60 db at 1 khz ? noise: typ. 36 v rms from 100 hz to 100 khz ? stable with small 1 f ceramic capacitor ? soft?start to reduce inrush current and overshoots ? thermal shutdown and current limit protection ? soa limiting for high vin / high iout ? static / dynamic ? active discharge option available (upon request) ? available in tsot?23?5 and wdfn6 2x2 mm packages ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? wireless chargers ? portable equipment ? communication systems figure 1. typical application schematic 1 f ceramic ncp718 in out gnd c out c in v in v out 1 f ceramic en off on nc www. onsemi.com see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information marking diagrams wdfn6 mt suffix case 511br pin connections wdfn6 2x2 mm (top view) 1 2 3 xx m 1 6 5 4 tsot?23?5 sn suffix case 419ae 1 xx m 1 (note: microdot may be in either location) xx = specific device code m = date code* = pb?free package xx = specific device code m = date code tsot?23?5 (top view) 1 *date code orientation and/or position may vary depending upon manufacturing location. in nc en out nc/adj gnd in gnd en out nc/adj gnd
ncp718 www. onsemi.com 2 figure 2. simplified block diagram in thermal shutdown mosfet driver with current limit integrated soft?start bandgap reference enable logic en out gnd en * active discharge version a only in thermal shutdown mosfet driver with current limit integrated soft?start bandgap reference enable logic en out gnd en * active discharge version a only adj fixed version adjustable version table 1. pin function description pin no. (wdfn6) pin no. (tsot?23?5) pin name description 6 1 in input pin. a small capacitor is needed from this pin to ground to assure stability. 3, exp 2 gnd power supply ground. 4 3 en enable pin. driving this pin high turns on the regulator. driving en pin low puts the regu- lator into shutdown mode. 2 4 nc / adj fixed version: no connection. this pin can be tied to ground to improve thermal dissipa- tion or left disconnected. adjustable version: feedback pin for set?up output voltage. use resistor divider for volt- age selection. 1 5 out regulated output voltage pin. a small 1 f ceramic capacitor is needed from this pin to ground to assure stability. 5 ? n/c no connection. this pin can be tied to ground to improve thermal dissipation or left dis- connected. table 2. absolute maximum ratings rating symbol value unit input voltage (note 1) v in ?0.3 to 24 v enable voltage v en ?0.3 to v in+0.3 v output voltage v out ?0.3 to v in+0.3 (max. 6) v output short circuit duration t sc indefinite s maximum junction temperature t j(max) 150 c storage temperature t stg ?55 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, charged device model (note 2) esd cdm 1000 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec?q100?002 (eia/jesd22?a114) esd charged device model tested per eia/jesd22?c101, field induced charge model. latch up current maximum rating tested per jedec standard: jesd78. latch?up is not guaranteed on enable pin.
ncp718 www. onsemi.com 3 table 3. thermal characteristics rating symbol value unit thermal characteristics, wdfn6, 2 mm x 2 mm thermal resistance, junction?to?air r ja 65 c/w thermal characteristics, tsot?23?5 thermal resistance, junction?to?air r ja 235 c/w table 4. electrical characteristics - 40 c t j 125 c; v in = 2.5 v or (v out + 1.0 v), whatever is greater; i out = 1 ma, c in = c out = 1 f, unless otherwise noted. typical values are at t j = +25 c. (note 3) parameter test conditions symbol min typ max unit operating input voltage v in 2.5 24 v output voltage accuracy (fixed versions) ?40 c t j 125 c , v out + 1 v < v in < 16 v, 0.1 ma < i out < 300 ma (note 5 ) v out < 1.8 v v out ?3% +3% v v out 1.8 v ?2% +2% reference voltage ?40 c t j 125 c , v out + 1 v < v in < 16 v v adj 1.2 v reference voltage accuracy ?40 c t j 125 c , v out + 1 v < v in < 16 v v out ?2% +2% v line regulation v out + 1 v v in 16 v, iout = 1 ma reg line 10 mv load regulation i out = 0.1 ma to 300 ma reg load 10 mv dropout voltage v do = v in ? (v out(nom) ? 3%), i out = 300 ma (note 4) 2.1 v ? 2.4 v v do 480 mv 2.5 v ? 2.7 v 320 490 2.8 v ? 3.2 v 295 465 3.3 v ? 4.9 v 275 440 5 v 240 380 maximum output current v in = v out + 1 v (note 5) i lim 300 800 ma disable current v en = 0 v, v in = 5 v i dis 0.1 1.0 a quiescent current i out = 0 ma, ?40 c t j 125 c i q 4.0 8.0 a ground current i out = 10 ma i gnd 50 a i out = 300 ma 300 power supply rejection ratio v in = 3.5 v + 100 mvpp v out = 2.5 v i out = 1 ma, cout = 1 f f = 1 khz psrr 60 db output noise voltage v out = 1.2 v, i out = 10 ma f = 100 hz to 100 khz v n 36 v rms enable input threshold voltage voltage increasing v en_hi 1.2 ? ? v voltage decreasing v en_lo ? ? 0.4 adj pin current v in = v out + 1 v i adj 0.1 1.0 a en pin current v en = 5.5 v i en 100 na active output discharge resistance v in = 5.5 v, v en = 0 v rdis 100 thermal shutdown temperature (note 6) temperature increasing from t j = +25 c t sd 165 c thermal shutdown hysteresis (note 6) temperature falling from t sd t sdh ? 25 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. performance guaranteed over the indicated operating temperature range by design and/or characterization production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 4. voltage dropout for voltage variants below 2.1 v is given by minimum input voltage 2.5 v. 5. respect soa 6. guaranteed by design and characterization.
ncp718 www. onsemi.com 4 typical characteristics figure 3. output voltage vs. temperature ? v out = 1.2 v figure 4. quiescent current vs. input voltage t j , junction temperature ( c) v in , input voltage (v) 100 80 60 40 20 0 ?20 ?40 1.180 1.184 1.192 1.196 1.200 1.220 22 18 16 12 10 8 4 2 2.0 2.2 2.6 2.8 3.0 3.4 3.8 4.0 figure 5. disable current vs. temperature figure 6. current to enable pin vs. temperature t j , junction temperature ( c) t j , junction temperature ( c) 120 80 60 40 20 0 ?20 ?40 0 0.1 0.2 0.3 0.4 0.5 0.6 1.0 120 80 60 40 20 0 ?20 ?40 0 0.01 0.02 0.06 0.07 0.08 0.09 0.10 figure 7. ground current vs. output current ? v out = 1.2 v figure 8. short circuit current vs. temperature i out , output current (ma) t j , junction temperature ( c) 9 7 6 5 4 2 1 0 0 3 6 12 18 21 27 30 120 100 60 40 20 0 ?20 ?40 440 460 500 520 560 580 600 640 v out , output voltage (v) i q , quiescent current ( a) i dis , disable current ( a) i en , enable current ( a) i gnd , ground current ( a) i sc , short circuit current (ma) 120 1.188 1.204 1.208 1.212 1.216 0.7 0.8 0.9 100 3810 9 15 24 6142024 2.4 3.2 3.6 100 0.05 0.04 0.03 80 480 540 620 v in = 2.5 v v out = 1.2 v c in = 1 f c out = 1 f i out = 1 ma v in = 24 v c in = 1 f c out = 1 f v in = 2.5 v v in = 2.5 v v out = 1.2 v c in = 1 f c out = 1 f v in = 2.5 v v out = 1.2 v c in = 1 f c out = 1 f v en = v in v out = 1.2 v i out = 10 ma c in = 1 f c out = 1 f v in = 24 v v in = 2.5 v v out = 1.2 v c in = 1 f c out = 1 f 125 c 25 c ?40 c
ncp718 www. onsemi.com 5 typical characteristics figure 9. soa current limit vs. differential voltage figure 10. dropout voltage vs. output current ? v out = 2.5 v v dif , differential voltage v in ? v out (v) i out , output current (ma) 20 18 14 24 6 4 2 0 0 60 120 240 300 360 480 600 0.36 0.28 0.24 0.20 0.12 0.08 0.04 0 0 0.04 0.08 0.16 0.24 0.28 0.32 0.40 figure 11. power supply rejection ratio vs. current, v in = 3.5 v, c out = 1 f figure 12. power supply rejection ratio vs. current, v in = 12 v, c out = 1 f frequency (hz) frequency (hz) 10m 1m 100k 10k 1k 100 10 0 10 20 40 50 60 70 90 10m 1m 100k 10k 1k 100 10 0 10 20 40 50 60 80 90 figure 13. output voltage noise spectral density for v out = 1.2 v, i out = 10 ma, c out = 1 f figure 14. output voltage noise spectral density for v out = 1.8 v, i out = 10 ma, c out = 1 f frequency (hz) frequency (hz) 1m 100k 10k 1k 100 10 10 100 1k 10k 100k 1m 100k 10k 1k 100 10 10 100 1k 10k 100k soa current limitation (ma) v drop , dropout voltage (mv) rr, ripple rejection (db) rr, ripple rejection (db) output voltage noise (nv/ hz ) output voltage noise (nv/ hz ) 12 10 81622 180 420 540 30 80 30 70 0.16 0.32 0.40 0.12 0.20 0.36 f = 50 hz duty = 20% c in = 1 f c out = 1 f v out = 2.5 v c in = 1 f c out = 1 f 125 c 25 c ?40 c v in = 2.5 v v out = 1.2 v i out = 10 ma c in = 1 f c out = 1 f mlcc, x7r, 0805 1 ma 10 ma 100 ma 1 ma 10 ma 100 ma v in = 3.5 v v out = 2.5 v c in = 1 f c out = 1 f mlcc, x7r, 0805 v in = 2.8 v v out = 1.8 v i out = 10 ma c in = 1 f c out = 1 f mlcc, x7r, 0805 v in = 12 v v out = 2.5 v c in = 1 f c out = 1 f mlcc, x7r, 0805
ncp718 www. onsemi.com 6 applications information the ncp718 is the member of new family of wide input voltage range low dropout regulators which delivers ultra low ground current consumption, good noise and power supply rejection ratio performance. the ncp718 incorporates en pin and soft?start feature for simple controlling by microprocessor or logic. input decoupling (c in ) it is recommended to connect at least 1 f ceramic x5r or x7r capacitor between in and gnd pin of the device. this capacitor will provide a low impedance path for any unwanted ac signals or noise superimposed onto constant input voltage. the good input capacitor will limit the influence of input trace inductances and source resistance during sudden load current changes. higher capacitance and lower esr capacitors will improve the overall line transient response. output decoupling (c out ) the ncp718 does not require a minimum equivalent series resistance (esr) for the output capacitor. the device is designed to be stable with standard ceramics capacitors with values of 1 f or greater. the x5r and x7r types have the lowest capacitance variations over temperature thus they are recommended. power dissipation and heat sinking the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. for reliable operation junction temperature should be limited to +125 c. the maximum power dissipation the ncp718 can handle is given by: p d(max) t j(max) t a r ja (eq. 1) the power dissipated by the ncp718 for given application conditions can be calculated from the following equations: p d v in i gnd (i out ) i out v in v out (eq. 2) or v in(max) p d(max) v out
i out i out i gnd (eq. 3) hints v in and gnd printed circuit board traces should be as wide as possible. when the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. place external components, especially the output capacitor, as close as possible to the ncp718, and make traces as short as possible .
ncp718 www. onsemi.com 7 ordering information device part no. voltage option marking option package shipping ? ncp718amtadjtbg adj. ga with active output discharge wdfn6 (pb?free) 3000 / tape & reel ncp718bmtadjtbg adj. gc without active output discharge ncp718asnadjt1g adj. gaa with active output discharge tsot?23?5 (pb?free) 3000 / tape & reel ncp718asn120t1g 1.2 v gae ncp718asn150t1g 1.5 v gaf ncp718asn180t1g 1.8 v gad ncp718asn250t1g 2.5 v gag ncp718asn300t1g 3.0 v gah ncp718asn330t1g 3.3 v gaj ncp718asn500t1g 5.0 v gak NCP718BSNADJT1G adj. gac without active output discharge ncp718bsn120t1g 1.2 v gca ncp718bsn150t1g 1.5 v gcc ncp718bsn180t1g 1.8 v gcd ncp718bsn250t1g 2.5 v gcf ncp718bsn300t1g 3.0 v gcg ncp718bsn330t1g 3.3 v gch ncp718bsn500t1g 5.0 v gce ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp718 www. onsemi.com 8 package dimensions tsot?23?5 case 419ae issue o e1 e a2 a1 e b d c a top view side view end view l1 l l2 notes: (1) all dimensions are in millimeters. angles in degrees. (2) complies with jedec mo-193. symbol min nom max a a1 a2 b c d e e1 e l 0o 8o l1 l2 0.01 0.80 0.30 0.12 0.30 0.05 0.87 0.15 2.90 bsc 2.80 bsc 1.60 bsc 0.95 typ 0.40 0.60 ref 0.25 bsc 1.00 0.10 0.90 0.45 0.20 0.50
ncp718 www. onsemi.com 9 package dimensions wdfn6 2x2, 0.65p case 511br issue b mounting footprint* recommended dimensions: millimeters 6x 0.45 2.30 1.12 1.72 0.65 pitch 6x 0.40 1 package outline *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.25 mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. 5. for devices containing wettable flank option, detail a alternate construction a-2 and detail b alternate construction b-2 are not applicable. seating plane d e 0.10 c a3 a a1 0.10 c dim a min max millimeters 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.25 0.35 d 2.00 bsc d2 1.50 1.70 0.90 1.10 e 2.00 bsc e2 e 0.65 bsc 0.20 0.40 l pin one reference 0.05 c 0.05 c note 4 a 0.10 c note 3 l e d2 e2 b b 3 6 6x 1 4 0.05 c bottom view l1 detail a l alternate constructions l detail a detail b a b top view c side view --- 0.15 l1 6x m m ?? detail b mold cmpd exposed cu alternate constructions ?? on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 ncp718/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?
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